VLSI Research Group - Publications: Conference Papers
1999
- T. Aamodt and P. Chow, "Numerical Error Minimizing Floating-Point to
Fixed-Point ANSI C Compilation," 1st Workshop on Media Processors and DSPs,
1999.
- A. Balatsos and D. Lewis,
"Low Skew Clock Generator with Dynamic Impedance and Delay Matching,"
IEEE International Symposium on Solid-State Circuits, February 1999.
- V. Betz and J. Rose,
"Circuit Design, Transistor Sizing and Wire Layout of FPGA Interconnect,"
IEEE Custom Integrated Circuits Conference, pp. 171-174, May 1999.
- V. Betz and J. Rose,
"FPGA Routing Architecture: Segmentation and Buffering to Optimize
Speed and Density,"
FPGA '99, ACM Symposium on FPGAs, pp. 59-68, 1999.
- A. Carusone and D.A. Johns,
"Obtaining Digital Gradient Signals for Analog Adaptive Filters,"
IEEE International Symposium on Circuits and Systems, May 1999.
- J. Cheng and D.A. Johns,
"A 100MHz Partial Analog Equalizer for Use in Wired Data Transmission,"
ESSCC, September 1999.
- H. Djahanshahi and C.A.T. Salama,
"Differential 0.35-micron CMOS Circuits for 622MHz/933MHz Monolithic Clock
and Data Recovery Applications,"
IEEE International Symposium on Circuits and Systems, Proceedings, vol. 2,
pp. 93-96, 1999.
- H. Djahanshahi and C.A.T. Salama,
"Gigabit per Second per Pin Differential CMOS Circuits for Pseudo ECL
Signalling,"
IEEE Custom Integrated Circuits Conference, Proceedings, pp. 601-604, 1999.
- D. Gradinaru, W.T. Ng and C.A.T. Salama,
"High Voltage High Frequency Silicon Bipolar Transistors,"
IEEE/IEEJ International Symposium on Power Semiconductor Devices,
Proceedings, pp. 293-296, May 1999. [This presentation was awarded the Best
Student Paper.]
- S. Gupta and F. N. Najm,
"Analytical model for high level power modeling of combinational and
sequential circuits,"
IEEE Alessandro Volta Memorial
Workshop on Low Power Design, pp. 164-172, March 1999.
- S. Gupta and F. N. Najm,
"Energy-per-cycle estimation at RTL,"
IEEE International Symposium on Low Power Electronics and Design,
pp. 121-126, Aug. 16-17, 1999.
- S. Gupta and F. N. Najm,
"Power macro-models for DSP blocks with application to high-level synthesis,"
IEEE International Symposium on Low Power Electronics and Design,
pp. 103-105, August 1999.
- I. Hamer and P. Chow,
"DES Cracking on the Transmogrifier-2a,"
Workshop on Cryptographic Hardware and Embedded Systems, August 1999.
- G. Hartman, K. Martin, and A. McLaren,
"Continuous-Time Adaptive Analog Coaxial Cable Equalizer in 0.5-micron
CMOS,"
IEEE International Symposium on Circuits and Systems, Proceedings,
vol. 2, pp. 97-100, June 1999.
- P. Herman, R. Majoribanks, M. Nantel, X. Gu, J. Kalbfleisch, J. Long, M.
Lukacs, and T. Oettl,
"Advanced-Laser Processing of Photonic and Microelectronics Components at
Photonics Research Ontario,"
Society of Photo-Optical and Instrumentation Engineers (SPIE) Photonics West
Conference, January 1999.
- S. Hranilovic and D.A. Johns,
"A Multilevel Modulation Scheme for High-Speed Wireless Infrared
Communications,"
IEEE International Symposium on Circuits and Systems, May 1999.
- M. Hutton and J. Rose, "Applications of Clone Circuits to
Issues in Physical Design," IEEE International Symposium on Circuits and
Systems, paper 92.3, Orlando, FL, 1999.
- M. Hutton and J. Rose, "Equivalence Classes of Clone Circuits for
Physical-Design Benchmarking," IEEE International Symposium on Circuits and
Systems, paper 66.2, Orlando, FL, 1999.
- J. Jacob and P. Chow,
"Memory Interfacing and Instruction Specification for Reconfigurable
Processors,"
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays,
Proceedings, pp 145-154, February 1999.
- M. Khalid and J. Rose, "Hardwired-Clusters Partial-Crossbar: A Hierarchical
Routing Architecture for Multi-FPGA Systems," RAW '99, San Juan, Puerto
Rico, April 1999.
- A. Khoueir, Z.H. Lu, W.T. Ng, Y. Ma,
"Ultrathin Oxynitride Formation by Low Energy Ion-implantation,"
Canadian Semiconductor Technology Conference, Proceedings, pp. 39, August
1999.
- A. Khoueir, Z.H. Lu, W.T. Ng, Y. Ma,
"Ultrathin Oxynitride Formation by Low Energy Ion-implantation,"
International Conference on VLSI and CAD (ICVC), October 1999.
- D. Lewis,
"High Radix Redundant CORDIC Algorithms for Complex Logarithmic Number
System Arithmetic,"
Arith-14, April 1999.
- S. Li and D. Lewis,
"470MHz Digital Filter on Delta-Sigma Modulated Signals,"
IEEE Custom Integrated Circuits Conference, Proceedings, pp. 25.6.1-25.6.4,
May 1999.
- J. Long,
"RF and High-Speed Circuit Design Using On-Chip Inductors and Transformers,"
Invited Talk,
IEEE Solid-State Circuits Council Technical Workshop on RF Passive
Components held in conjunction with the IEEE International Symposium on
Solid-State Circuits, February 1999.
- J. Long, R. Hadaway, D. Harame,
"A 5.1-5.8GHz Low-Power Image-Reject Downconverter in SiGe Technology,"
Bipolar/BiCMOS Circuits Technology Meeting, Proceedings, pp. 66-70,
September 1999.
- J. Long and M. Maliepaard,
"A 1V 900MHz Image-Reject Downconverter in 0.5-micron CMOS,"
IEEE Custom Integrated Circuits Conference, Proceedings, pp. 665-668, May
1999.
- A. Marquardt, V. Betz, and J. Rose,
"Using Cluster-Based Logic Blocks and
Timing-Driven Packing to Improve FPGA Speed and Density,"
FPGA '99, ACM Symposium on FPGAs, pp. 37-46, 1999.
- K. Martin,
"Phase-Locked-Loop Design Made Easy,"
Keynote Talk,
IEE Colloquium on Phase-Locked Loops, London, May 1999.
- L. Noujeim, K.G. Balmain and S. Zaky,
"Electromagnetic Interference Stress Testing,"
XXVIth General Assembly, International Union of Radio Science (URSI),
August 1999.
- J. Podaima and P.G. Gulak,
"Self-Timed Fully Parallel Content Addressable Queue for Switching
Applications,"
CICC, Proceedings, paper 11.4, May 1999.
- S. Ramparasad, I. N. Hajj, and F. N. Najm,
"An optimization technique for dual-output domino logic,"
IEEE International Symposium on Low Power Electronics and Design,
pp. 121-126, August 1999.
- Y. Sankar and J. Rose,
"Trading Quality for Compile Time: Ultra-Fast
Placement for FPGAs"
FPGA '99, ACM Symposium on FPGAs, pp. 157-166, 1999.
- Z. Vranesic, "A Computer Architect's View of Photonic Interconnects,"
(invited talk) Proc. Optics in Computing, OSA Conference, Aspen, CO, pp.
144-145, April 1999.
- D. Walkey, T. Smy, D. Marchesan, H. Tran, C. Reimer, T. Kleckner, M.
Jackson, M. Schroeter, and J. Long,
"Extraction and Modelling of Thermal Behavior in Trench Isolated Bipolar
Structures,"
Bipolar/BiCMOS Circuits Technology Meeting, Proceedings, pp. 97-100,
September 1999.
- A. Ye and D. Lewis,
"Procedural Texture Mapping on FPGAs,"
FPGA-99, February 1999.
- B. Zand, K. Phang, and D.A. Johns,
"Transimpedance Amplifier with Differential Photodiode Current Sensing,"
IEEE International Symposium on Circuits and Systems, May 1999.
- L. Zhang, B. Beacham, M. Hashemi, P. Chow, A. Leon-Garcia,
"Design and Implementation of a Scheduler Engine for a Programmable
Packet Switch,"
IEEE Hot Interconnects 7, August 1999.
- J. Zhu and D. Gajski,
"Soft Scheduling in High Level Synthesis,"
IEEE/ACM Design Automation Conference, June 1999.
- J. Zhu and D. Gajski,
"A Unified Formal Model for ISA and FSMD,"
International Workshop on Hardware/Software Codesign,
May 1999.
- J. Zhu and D. Gajski,
"OpenJ: An Extensible System Level Design Language,"
Proceedings of Design Automation and Test Conference in Europe,
March 1999.
- J. Zhu and D. Gajski,
"A Retargetable, Ultra-fast Instruction Set Simulator,"
Proceedings of Design Automation and Test Conference in Europe,
March 1999.
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