University of Toronto
Department of Electrical and Computer Engineering

Lectures:

• System on a Chip/IC Design Alternatives
• Technology, Process and Device Design
• VLSI Process Technology Options
• CMOS, BiCMOS Gates
• MOS Analog IC Design
• Standard Cell Design
• VHDL
• LP/LV Design

Text:

• A set of notes covering the majority of topics will be handed out.

References:

• Baker, Li and Boyce, CMOS Circuit Design Layout and Simulation, IEEE Press, 1998.
• Weste and Eshragian, Principles of CMOS VLSI Design, Second Edition, Addison Wesley, 1993.
• Rabaey, Chandrakasan and Nikolic, Digital Integrated Circuits, Second Edition, Prentice Hall, 2003.
• Smith, Application Specific IC's, Addison Wesley, 1998.
• Veendrick, Deep Submicron CMOS IC's, Kluwer, 1998.

Schedule:

Laboratories:

• VLSI User's Manual 2003 is the basis for the labs.
• The assigned labs can be carried out in Pratt LP463 or on any VRG or EECG computer.
• The lab sequence is intended to expose you gradually to the Cadence and Synopsys design environment and allow you to do your assignments and projects.
• TA's will answer questions by email.

TA's:

Schedule:

See http://www.vrg.utoronto.ca/~salama/ECE1388F/0_ECE1388_intro_2.pdf