VLSI Research Group - Publications: Conference Papers
1995
- H. Anis, J. Goodwin, T. Makino, J.M. Xu,
"Effect of Nonlinear Gain on Intermodulation Distortion",
LEOS'95, Nov. 1995.
- V. Betz, J. Rose,
"Using Architectural 'Families' to Increase FPGA Speed and Density,"
ACM International Symposium on Field-Programmable Gate Arrays,
FPGA '95, pp. 10-16, Feb 1995.
- P. Chow, P. Chow, and P.G. Gulak,
"A Field-Programmable Mixed-Analog-Digital Array,"
1995 International Symposium on Field-Programmable Arrays,
pp. 104-109, Feb. 1995.
- P. Chow, D. Karchmer, P. Chow, R. White, T. Ngai, P. Hodgins, D. Yeh,
J. Ranaweera, I. Widjaja, and A. Leon-Garcia,
"A 50,000 Transistor Packet-Switching Chip for the StarBurst ATM Switch,"
Custom Integrated Circuits Conference, pp. 435-438, May 1995.
- R. Duncan, K. Martin, and A.S. Sedra,
"A 1 GHz Quadrature Sinusoidal Oscillator,"
IEEE Custom Integrated Circuits Conference, pp. 91-94, May 1995.
- K.I. Farkas, N.P. Jouppi, and P. Chow,
"How Useful are Non-blocking Loads, Stream Buffers, and Speculative
Execution in Multiple Issue Processors?,"
First International Symposium on High-Performance Computer Architecture,
pp 78-89, Jan. 1995.
- P.G. Gulak,
"A Field-Programmable Analog Arrays: Past Present and Future Perspectives,"
Invited Paper, TENCON 95, Nov. 1995.
- M. Jaseemuddin and Z.G. Vranesic,
"Bidirectional Ring: An Alternative to the Hierarchy of Unidirectional Rings,"
Proceedings, Euro-Par '95 - International Conference on Parallel Processing,
pp. 567-578, Aug. 1995.
- D. Jones and D. Lewis,
"A Time-Multiplexed FPGA Architecture for Logic Emulation",
Proc. Custom Integrated Circuits Conference, pp 495-498, May 1995.
- M. Khalid and J. Rose,
"The Effect of Fixed I/O Pin Positioning on The Routability and Speed
of FPGAs,"
Proceedings, Canadian Workshop of Field-Programmable Devices,
FPD 95, pp. 94-102, 1995.
- K. Kozma, D.A. Johns and A.S. Sedra,
"An approach for tuning high-Q continuous-time bandpass filters,"
IEEE International Symposium on Circuits and Systems,
pp. 1037-1040, May, 1995.
- E. Lee and P.G. Gulak,
"A Transconductor-Based Field Programmable Analog Array,"
ISSCC, Feb. 1995.
- D. Lewis,
"A 114 MFLOPS Logarithmic Number System Arithmetic Unit for DSP Applications"
International Conference on Solid-State Circuits,
Proceedings, pp 86-87, Feb. 1995.
- J.R. Long and M.A. Copeland,
"Modeling of Monolithic Inductors and Transformers for Silicon RFIC Design",
IEEE MTT-S International Symposium on Technologies for Wireless Applications,
pp. 129-132, February 1995.
- J.R. Long, M.A. Copeland, P. Schvan and R.A. Hadaway,
"A Low-Voltage Silicon Bipolar RF Front-End for PCN Receiver Applications",
International Solid-State Circuits Conference, pp. 140-141, Feb. 1995.
- T. Ngai, J. Rose, S. Wilton,
"An SRAM-Programmable Field-Configurable Memory"
IEEE Custom Integrated Circuits Conference, pp. 499-502, May 1995.
- B. Owen, R. Duncan, S. Jantzi, C. Ouslis, S. Rezania, and K. Martin,
"BALLISTIC, An Analog Layout Language,"
IEEE Custom Integrated Circuits Conference, pp. 41-44, May 1995.
- K. Schultz and P.G. Gulak,
"Physical Performance Limits for Shared Buffer ATM Switches to the
Year 2005,"
International Switching Symposium (ISS), April 1995.
- M.H. Shakiba, D.A. Johns and K.W. Martin,
"A 200MHz 3.3V BiCMOS class-IV partial-response analog Viterbi decoder,"
Custom Integrated Circuits Conference, pp. 567-570, May, 1995.
- T. Sowlati, Y. Greshishchev, C.A.T. Salama, G. Rabjohn and J. Sitch,
"Linear Transmitter Design Using High Efficiency Class E Power Amplifiers,"
International Symposium on Personal, Indoor, and Mobile Radio Communications,
Proceedings, pp. 1233-1237, 1995.
- A.A. Tager, M. Lu, M. Moskovits, and J.M. Xu,
"SET Induced Spontaneous Charge Polarization in Coupled Nanowire
Double-Junction Systems",
Proceedings, International Conference on Physics of Low-Dimensional Structures,
Sept. 1995.
- A. Tager, M. Lu, M. Moskovits and J.M. Xu,
"Single-Electron Tunneling in Coupled Nanowire Systems",
Extended Abstract of SSDM'95, pp. 183-185, August 1995.
- S. Wilton, J. Rose, Z. Vranesic,
"Architecture of Centralized Field-Configurable Memory,"
ACM International Symposium on Field-Programmable Gate Arrays,
FPGA '95, pp. 97-103, Feb 1995.
- Z. Zilic, G. Lemieux, K. Loveless, S. Brown and Z. Vranesic,
"Designing for High Speed-Performance in CPLDs and FPGAs,"
Third Canadian Workshop on Field-Programmable Devices,
pp. 108-113, May 1995.
- Z. Zilic and Z.G. Vranesic,
"Reed-Muller Transform for Incompletely Specified Functions via
Sparse Polynomial Interpolation,"
Proceedings, IEEE International Symposium on Multiple-valued Logic,
pp. 36-43, May 1995.
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